It is difficult to achieve both high performance with many interconnected CPUs and reduce power consumption at the same time. To reduce the power consumption of the whole system, it is necessary to reduce the power consumption of each CPU. In a normal large-scale system with many interconnected high performance CPUs, increases in the number of CPUs are proportional to increases in the amount of power consumed. World's top performance per unit of power consumptionĪnother challenge with the K computer is how much power consumption can be reduced.
Let's look at the approaches to achieving "high performance," "high reliability," and "low power consumption" in the SPARC64™ VIIIfx. Furthermore, the smaller the physical circuit size, the greater the reduction in power consumption. At the same time, since this miniaturization also decreases the number of components, the failure rate also decreases. As the level of integration increases the wire length in the circuit also becomes shorter and the number of cores, the base units that perform calculations, increase. But if you make the wire as thin as possible the same circuit can be reduced to the size of a postage stamp. If you drew complex electric circuit using 1-mm wide wires, it would turn out to be the size of an athletic field. The features of this CPU are described below.Ĥ5 nanometer process technology is employed in the "SPARC64™ VIIIfx CPU to provide a number of advantages.
The K computer, uses a "SPARC64™ VIIIfx" CPU designed and developed by Fujitsu.
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